/* [File] : wf_cr_sw_def.h */
/* [Copyright] : Copyright (C) 2018 Mediatek Incorportion. All rights reserved.
*/

/*******************************************************************************
* Copyright (c) 2009 MediaTek Inc.
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* or any other use whatsoever of this material is strictly prohibited
* except in accordance with a Software License Agreement with
* MediaTek Inc.
********************************************************************************
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#ifndef _WF_CR_SW_DEF_H
#define _WF_CR_SW_DEF_H

/*******************************************************************************
* M A C R O S
********************************************************************************
*/


/******************************************************************************
*
*                     MCU_SYSRAM SW CR Definitions
*
******************************************************************************
*/
#define WF_SW_DEF_CR_BASE                0x00400E00

#define WF_SW_DEF_CR_SER_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x000) /* E00 */
#define WF_SW_DEF_CR_PLE_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x004) /* E04 */
#define WF_SW_DEF_CR_PLE1_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x008) /* E08 */
#define WF_SW_DEF_CR_PLE_AMSDU_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x00C) /* E0C */
#define WF_SW_DEF_CR_PSE_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x010) /* E10 */
#define WF_SW_DEF_CR_PSE1_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x014) /* E14 */
#define WF_SW_DEF_CR_LAMC_WISR6_BN0_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x018) /* E18 */
#define WF_SW_DEF_CR_LAMC_WISR6_BN1_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x01C) /* E1C */
#define WF_SW_DEF_CR_LAMC_WISR7_BN0_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x020) /* E20 */
#define WF_SW_DEF_CR_LAMC_WISR7_BN1_STATUS_ADDR \
	(WF_SW_DEF_CR_BASE + 0x024) /* E24 */
#define WF_SW_DEF_CR_USB_MCU_EVENT_ADD \
	(WF_SW_DEF_CR_BASE + 0x028) /* E28 */
#define WF_SW_DEF_CR_USB_HOST_ACK_ADDR \
	(WF_SW_DEF_CR_BASE + 0x02C) /* E2C */
#define WF_SW_DEF_CR_ICAP_SPECTRUM_MODE_ADDR \
		(WF_SW_DEF_CR_BASE + 0x030) /* E30 */

#endif /* _WF_CR_SW_DEF_H */


